Re: Cache coherency... and locking

From: Oliver Xymoron (oxymoron@waste.org)
Date: Fri Jul 28 2000 - 12:44:34 EST


On Fri, 28 Jul 2000, Peter Rival wrote:

> Oliver Xymoron wrote:
> >
> > That's specific to MIPS. A general Linux NUMA model probably won't assume
> > coherence.
> >
>
> Why are we not going to assume coherence? What NUMA platforms do we intend
> to support in the relevant future that are not CC-NUMA? AFAIK, the only NUMA
> platforms we support so far are the SGI Origin 2X00 series (CC-NUMA) and the
> Compaq AlphaServer GS* series (also CC-NUMA).

Because cache coherence is both complex and expensive and treating a NUMA
as a tight cluster rather than a single machine (as you mention) is
probably a saner architecture.

CC is primarily a big deal for user space, for apps pretending they're on
SMP. We don't want to encourage this model as it's fundamentally a bad
match for the hardware.

As for the kernel, supporting the two models should be relatively easy
compared to something like adding SMP support in the first place.. We are
already paying close attention to memory-sharing assumptions for
performance reasons and the number of inter-processor primitives is small.
 
> I just don't want generic code to have to pay too heavy a price for future
> support of a platform we never support. And truth be told, at that point
> we'd be better off just running with Larry's idea of multiple
> semi-independent operating systems and handling the lack of cache coherence
> in a sane and well-defined way.

I think this even makes sense on machines with CC hardware. The break-even
number of processors might be larger, but it's smaller than a medium-sized
NUMA machine.

--
 "Love the dolphins," she advised him. "Write by W.A.S.T.E.." 

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