SMP and PCI bus transaction sync?

From: Jeff Garzik (
Date: Fri Apr 28 2000 - 11:54:39 EST

In some of the net drivers I've hacked on, a spinlock is used to
serialize ALL access to the hardware. I am wondering if this is

It seems to me that, on some low level, a sane SMP system board will
serialize access to the PCI bus, making the spinlock unnecessary when
you are doing simple things like reading a statistics register, or
performing some operations like updating Tx descriptors on one CPU while
updating Rx descriptors on another CPU.

So, bearing in mind hardware register access rules, is it possible to
relax the "hardware lock covers all hardware accesses" type spinlocking,
and let the PCI bus/mobo perform the requisite serialization.

Thanks for any enlightenment,


Jeff Garzik              | Nothing cures insomnia like the
Building 1024            | realization that it's time to get up.
MandrakeSoft, Inc.       |        -- random fortune

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