Not every i486 and i386 MP was weakly ordered.
Most weren't.
A few were.
Intel had no control over which was and which wasn't,
because everything was at the mercy of the system integrator.
Since the P54C DP and especially since the P6 glueless quad MP,
Intel has been making it easier to build a processor consistent MP
system than to build a weakly ordered system.
Indeed, as I indicated, I don't think that you *can* build a weakly
ordered P6 system using standard instructions - to build a weakly
ordered P6 system you have to do something like use acceses
to an uncached page as a convention.
But, a system integrator can still build a weakly ordered
system if they want to. There may even be good reasons.
----- Original Message -----
From: Jamie Lokier <lk@tantalophile.demon.co.uk>
To: Oliver Xymoron <oxymoron@waste.org>
Cc: Linus Torvalds <torvalds@transmeta.com>; Andy Glew <glew@cs.wisc.edu>; linux-kernel <linux-kernel@vger.rutgers.edu>
Sent: Tuesday, April 25, 2000 2:30 PM
Subject: Re: Linux spin_unlock debate (fwd)
> Oliver Xymoron wrote:
> > Not only have I now gotten positive test results for PPro steppings back
> > to 1, I have confirmation from Intel folks. Thanks, Andy.
>
> Andy Glew wrote:
> > So: if you are willing to write code that should work correctly
> > on every x86 multiprocessor to date (except for some of the
> > earliest i386 and i486 MPs that were weakly ordered) you
> > can use MOVB to release the lock.
>
> I heard that Linux has been ported to i486 MPs :-)
>
> enjoy,
> -- Jamie
>
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