On Tue, 11 Apr 2000, Manfred Spraul wrote:
>* They need the old pte value and the virtual address for their flush
>ipi.
Why can't they flush all the address space unconditionally on the other
cpus? I can't find a valid reason for which they do need the old pte
value. The tlb should be a virtual->physical mapping only, the pte isn't
relevant at all with the TLB. however if they really need both old pte
address and the virtual address of the page, they can trivially pass the
parameters to the other CPUs acquring a spinlock and using some global
variable exactly as IA32 does to avoid flushing the whole TLB on the other
CPUs in the flush_tlb_page case.
>Obviously their work-around
> flush_tlb_page()
> set_pte()
>is wrong as well, and it breaks all other architectures :-/
I bet it breaks s390 too.
The other filemap_sync race with threads that Kanoj was talking about is
very less severe since it can't make the machine unstable, but it can only
forgot to write some bit using strange userspace app design (only _data_
corruption can happen to the shared mmaping of the patological app).
Andrea
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