Andrew Morton writes:
> 400MHz uniprocessor Celeron. I am using non-DMA IDE, networking and
> very little else.
>
> The workload involved compiling a kernel, starting X, some NFS client
> activity and a fair bit of paging. All times in microseconds.
>
> file-n-line Count Min Max Avg
>
> console.c:2015 -> console.c:2039 224 .88 2068.86 21.90
> console.c:1857 -> console.c:1975 3283 .74 1943.17 15.80
> cs89x0.c:1186 -> cs89x0.c:1207 504 43.82 1280.56 143.47
> vt.c:810 -> vt.c:812 1 982.32 982.32 982.32
> ide-disk.c:451 -> ll_rw_blk.c:277 157 126.23 959.35 334.22
> ide-disk.c:451 -> ide.c:1622 1718 118.94 956.99 277.61
> ide.c:1533 -> ide.c:1622 8911 14.52 952.61 606.20
> ide.c:1533 -> ide.c:1298 3904 10.79 884.30 202.74
...
> I would be interested in hearing views on how significant a 2 msec
> interrupt blockage really is. Can it cause serial Rx overruns? GigE
> problems?
Viewing the worst case as 483 HZ makes it look awful.
You could lose 3 clock ticks with a 1024 HZ clock.
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This archive was generated by hypermail 2b29 : Fri Mar 31 2000 - 21:00:16 EST