Hello!
Try appended patch.
[ Jeff, do you see? You removed request_irq() and gratuitous 50 cycle delay
required for tulip reset disappeared. As result csr0 was not programmed
correctly and ... see my previous mail. 8)8)8)
Now this driver works on alpha not depending on alignment
of .data and debugging level 8)8).
It is not your fault. Relying on on "gratuitous" code lines to wait.
was utterly stupid hack. I would insert explicit udelay also after
reset deassertion. If you still remember where you reordered code,
look there too. Probably, it is not the only such place. 8)8)
]
Alexey
--- /net/minus/home/src/BH/vger3/vger-mirror/linux/drivers/net/tulip/tulip_core.c Fri Mar 3 20:23:07 2000
+++ linux/drivers/net/tulip/tulip_core.c Fri Mar 10 19:25:52 2000
@@ -259,6 +259,8 @@
/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
outl(0x00000001, ioaddr + CSR0);
+ udelay(2);
+
/* Deassert reset.
Wait the specified 50 PCI cycles after a reset by initializing
Tx and Rx queues and the address filter list. */
-
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This archive was generated by hypermail 2b29 : Wed Mar 15 2000 - 21:00:18 EST