Re: Code optimization <LEA Instruction>

From: H. Peter Anvin (hpa@transmeta.com)
Date: Thu Jan 27 2000 - 19:34:16 EST


Followup to: <Pine.LNX.3.95.1000127182026.1435C-100000@chaos.analogic.com>
By author: "Richard B. Johnson" <root@chaos.analogic.com>
In newsgroup: linux.dev.kernel
>
> On Thu, 27 Jan 2000, Alan Cox wrote:
>
> > > One of the things it states is that the LEA instruction can
> > > be used to change the value of an index register faster than
> > > using the ADD instruction (Page G-10, Intel '486 Rag).
> >
> > It is
>
> It is not. Never was and can't possibly be. Further, tests show
> as expected, that address generation takes more time than register
> addition.
>

Huh? LEA is just accessing what is, in effect, a third ALU. Either
should be the same speed, *but* you have to worry about scheduling,
which is CPU-dependent. P6 cores have two "normal" ALUs and one
address-generation one. One thing LEA lets you do is a three-register
operation, which the normal ALUs can't do:

        lea eax,[ebx+esi]

... instead of ...

        mov eax,ebx
        add eax,esi

(On Crusoe, of course, either of these become a single VLIW "add" atom
and thus are completely equivalent.)

        -hpa

-- 
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
"Unix gives you enough rope to shoot yourself in the foot."

- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/



This archive was generated by hypermail 2b29 : Mon Jan 31 2000 - 21:00:19 EST