This patch fixes <linux/linkage.h> which currently generates
the wrong cache alignments for the wrong CPUs. linkage.h
was especially broken for 686's.
It uses <linux/config.h> to determine the CPU class and model.
And it uses <asm/cache.h> to determine the cacheline size.
My thanks to Michael Elizabeth Chastain and Mike Galbraith.
Chris Sears
cbsears@ix.netcom.com
--- linkage.h.orig Thu Jan 27 11:49:04 2000
+++ linkage.h Thu Jan 27 11:54:18 2000
@@ -1,6 +1,9 @@
#ifndef _LINUX_LINKAGE_H
#define _LINUX_LINKAGE_H
+#include <linux/config.h>
+#include <asm/cache.h>
+
#ifdef __cplusplus
#define CPP_ASMLINKAGE extern "C"
#else
@@ -45,13 +48,17 @@
#define __ALIGN .balign 4
#define __ALIGN_STR ".balign 4"
#else
-#if !defined(__i486__) && !defined(__i586__)
+#if defined(CONFIG_X86) && !defined(CONFIG_M386)
+#define __ALIGN .align L1_CACHE_BYTES,0x90
+#if L1_CACHE_BYTES == 32
+#define __ALIGN_STR ".align 32,0x90"
+#else
+#define __ALIGN_STR ".align 16,0x90"
+#endif
+#else
#define __ALIGN .align 4,0x90
#define __ALIGN_STR ".align 4,0x90"
-#else /* __i486__/__i586__ */
-#define __ALIGN .align 16,0x90
-#define __ALIGN_STR ".align 16,0x90"
-#endif /* __i486__/__i586__ */
+#endif
#endif /* __sh__ */
#endif /* __mc68000__ */
#endif /* __arm__ */
-
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This archive was generated by hypermail 2b29 : Mon Jan 31 2000 - 21:00:19 EST